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|  How to implement a soft reset using C on ARM Cortex-M without triggering a watchdog?

How to implement a soft reset using C on ARM Cortex-M without triggering a watchdog?

October 14, 2024

Learn to perform a soft reset on ARM Cortex-M using C, bypassing the watchdog. A must-read guide for firmware developers seeking efficient reset techniques.

How to implement a soft reset using C on ARM Cortex-M without triggering a watchdog?

 

Understanding Soft Reset on ARM Cortex-M

 

A soft reset on an ARM Cortex-M microcontroller is essentially a way to restart the processor through software control without resorting to hardware solutions like toggling a reset pin. Implementing such a reset involves re-initializing the microcontroller's state to mimic a power-on without actually turning off the power. This process can usually be done without triggering a watchdog timer, which might otherwise reset the system if it thinks the system has become unresponsive.

 

Why Avoid Triggering a Watchdog?

 

  • The watchdog timer is designed to detect sysfailure and reset the processor. If triggered during a soft reset sequence, it can interfere with the process and might lead to unintended system behavior.
  • It’s important to properly configure and handle the watchdog during a reset to ensure that the system restarts cleanly without unintended watchdog activations.

 

Steps to Implement a Soft Reset

 

Disable Interrupts

 

  • Before performing a reset, it is crucial to disable all interrupts. This ensures that no interrupt routines interfere with the reset process.
__disable_irq();

 

Reset the Microcontroller

 

  • To initiate a software reset, you can use the System Control Block's Application Interrupt and Reset Control Register (SCB->AIRCR). This register controls whether to perform a system reset when writing to it. In particular, you will set the SYSRESETREQ bit to request a software reset.

  • Make sure to unlock the sequence by writing the key (0x5FA) to the VECTKEY field.

#include "stm32f4xx.h"  // Use specific header for the STM32 family

void SystemReset(void) {
    SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)  |   // VECTKEY
                   (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |   // Keep priority group unchanged
                   SCB_AIRCR_SYSRESETREQ_Msk);             // Set SYSRESETREQ bit
    __DSB();                                                // Ensure all outstanding memory accesses included buffered write are completed before reset
}

 

Handling Application-Specific Tasks

 

  • Before conducting a reset, ensure any application-specific operations such as saving context, closing files, or committing data to non-volatile memory have been completed, if necessary. This will prevent data loss on reset.

  • Implement functions that handle or prepare the system for a reset without leaving the system in an undetermined state.

void PrepareForReset(void) {
    // Example: Save system state
    SaveCriticalData();
    // Example: Shut down peripherals
    ShutdownPeripherals();
}

 

Re-Enabling Interrupts

 

  • Although part of the soft reset sequence involves disabling interrupts, once the reset process begins, hardware will handle returning the system to its initial state of interrupts based on startup code settings.

 

Testing and Verification

 

  • Rigorous testing is essential to ensure the soft reset completes as expected. Check processor state, peripheral statuses, and debug for anomalies post-reset.

  • Use breakpoints and debug logs if needed to verify that the reset sequence is correct and comprehensive.

 

Conclusion

 

By correctly implementing a soft reset, your system can reboot without manual interferences or watchdog interruptions. This methodology is particularly useful in embedded systems designs where uptime is critical and manual resets are impractical. Always follow the datasheets and reference manuals of the specific ARM Cortex-M architecture you are working with, as there can be variations across different microcontrollers.

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